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source By M. Steyaert, K. Uyttenhove (auth.), Rudy J. van de Plassche, Johan H. Huijsing, Willy Sansen (eds.)

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This e-book includes the prolonged and revised versions of the entire talks of the 9th AACD Workshop held in resort Bachmair, April eleven - thirteen 2000 in Rottach-Egem, Germany. The neighborhood association was once controlled by means of Rudolf Koch of Infineon applied sciences AG, Munich, Germany. this system consisted of six tutorials in line with day in the course of 3 days. specialists within the box offered those tutorials and cutting-edge details is communicated. The viewers on the finish of the workshop selects application issues for the next workshop. this system committee, along with Johan Huijsing of Delft college of expertise, Willy Sansen of Katholieke Universiteit Leuven and Rudy van de Plassche of Broadcom Netherlands BV Bunnik elaborates the chosen issues right into a three-day application and selects specialists within the box for presentation. each one AACD Workshop has given upward thrust to ebook of a ebook by way of Kluwer entitled "Analog Circuit Design". a sequence of 9 books in a row presents important details and reliable overviews of all analog circuit concepts referring to layout, CAD, simulation and equipment modeling. those books should be visible as a connection with these humans interested by analog and combined sign layout. the purpose of the workshop is to brainstorm on new and worthwhile layout principles within the zone of analog circuit layout. it's the wish of this system committee that this 9th ebook maintains the culture of rising contributions to the layout of analog and combined sign platforms in Europe and the remainder of the world.

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INTRODUCTION Modem wireless base stations digitize the entire received band, and then separate individual channels with digital filters [1] (Figure 1). Digitizing at IF poses a challenge on the design of the AID converter (ADC) for two reasons. First, the spurious free dynamic range (SFDR) specification becomes paramount; it must be over 80 dB. For this application, SFDR is defined as the difference between the full scale (FS) fundamental and the maximum spurious tone in decibel (dB) in an ADC output spectrum.

2dB for Fin=136MHz, Fs=700MSamplesjs. 8dB. 2dB 41dB 53MHz 136MHz -55 dB at Fin=136 MHz, Fs=600MHz Table 1: A/D converter Performance Summary integral non-linearity (INL) for the 6 bit mode are shown in Figure 19. 8V supplies, the A/D converter consumes 143mW of power. 66dB for Fin=53MHz, Fs=200Msamplesjs. Measured DNL and INL for the 7 bit mode are shown in Figure 21. To measure the intermodulation distortion due to the inter-leaving in the S/H, the S/H output was measured directly through a special test port that uses source follower buffers.

The integrating type preamp used above requires a smaller ampunt of power to achieve a desired dynamic gain. It also has a larger DC gain that helps in better offset cancellation. 2 Second Stage Preamp The operation of the second stage preamp (P2) is shown in Figure 9. P2 is autozeroed at the same time as Pl. To make sure that the differential input of P2 is zero during autozero, Pl is reset during that period. During this autozero the outputs of P2 are looped back to auxiliary inputs so that the differential output is approximately equal 33 to the offset of P2 referred to the auxiliary input.

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